The evolutionary PIC18CXXX architecture features include: Linear address space Additional instructions Designed for C compiler efficiency Modular emulation tool Code compatible Linear address space The on-chip memory addressing of the PIC18CXXX architecture is expanded to accommodate up to two million bytes of program memory and 4K bytes of data memory. As 8-bit MCU applications increase in complexity, memory requirements have grown rapidly. Additional instructions The PIC18CXXX combines the bit-manipulation instructions from the existing 14-bit architecture and byte manipulation instructions from the 16-bit architecture PICmicro CPUs, including the 8x8 single cycle hardware multiply and table read/write. The PIC18CXXX is a 16-bit instruction and 8-bit data ALU architecture, offering higher performance at an attractive price. Designed for C compiler efficiency As the MCU memory size has increased, so has the use of high-level language compilers. Systems using 4K words of program memory and greater usually write code in a high-level language such as ANSI C. Microcontrollers have traditionally been designed without regard for high-level languages such as "C." The PIC18CXXX architecture was developed in conjunction with the MPLAB-C18 compiler to optimize its efficiency. Linear program memory removes all paging-related overhead. Data memory is highly linear as well. There are 128 bytes of "Access RAM" highly suitable for global variable allocation. Three 12-bit-wide data pointer registers with pre-increment, post-increment, post-decrement and offset-addressing modes make it possible to implement the run-time parameter stack efficiently. The top of the hardware PC stack is readable and writable, making it possible to manage the stack entirely in software. This also makes the PIC18CXXX very suitable for RTOS implementation. Modular emulation tool Microchip's new modular emulator technology features a two-chip design which enhances system validation and overall productivity. A standard PICmicro device is used in the emulator featuring a special "emulation mode." A combination of Master-Slave emulator chips emulate the actual part. The Master chip emulates the CPU and the program memory access. The Slave chip emulates all the peripherals. The Slave emulator is simply a standard production part in a special emulation mode. The result is exact emulation of complex peripherals. Sensitive modules such as analog-to-digital converters and voltage references are emulated with no differences from the actual product. All peripherals with complex timing input and output are also the same as the real product. This provides easier system validation with a higher degree of emulation accuracy. Code compatible The PIC18CXXX architecture is source code compatible with existing PIC12CXXX, PIC16C5X and PIC16CXXX MCUs. Any assembly or C source code written for these architectures will migrate to the PIC18CXXX architecture. Source code written for the PIC17CXXX will transfer with minor modification.